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-rw-r--r--contrib/pgcrypto/crypt-blowfish.c2
-rw-r--r--doc/src/sgml/installation.sgml7
-rw-r--r--src/backend/storage/lmgr/s_lock.c5
-rw-r--r--src/include/port/atomics.h2
-rw-r--r--src/include/port/atomics/arch-hppa.h17
-rw-r--r--src/include/port/atomics/fallback.h12
-rw-r--r--src/include/storage/s_lock.h65
-rwxr-xr-xsrc/tools/pginclude/headerscheck2
8 files changed, 5 insertions, 107 deletions
diff --git a/contrib/pgcrypto/crypt-blowfish.c b/contrib/pgcrypto/crypt-blowfish.c
index 1264eccb3f2..5a1b1e10091 100644
--- a/contrib/pgcrypto/crypt-blowfish.c
+++ b/contrib/pgcrypto/crypt-blowfish.c
@@ -41,7 +41,7 @@
#ifdef __i386__
#define BF_ASM 0 /* 1 */
#define BF_SCALE 1
-#elif defined(__x86_64__) || defined(__hppa__)
+#elif defined(__x86_64__)
#define BF_ASM 0
#define BF_SCALE 1
#else
diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index c39bcb3ee7c..4784834ab9f 100644
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -3390,8 +3390,8 @@ export MANPATH
<para>
In general, <productname>PostgreSQL</productname> can be expected to work on
- these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS, RISC-V,
- and PA-RISC, including
+ these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS,
+ and RISC-V, including
big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
It is often
possible to build on an unsupported CPU type by configuring with
@@ -3422,7 +3422,8 @@ export MANPATH
<para>
Historical versions of <productname>PostgreSQL</productname> or POSTGRES
also ran on CPU architectures including Alpha, Itanium, M32R, M68K,
- M88K, NS32K, SuperH, and VAX, and operating systems including 4.3BSD, AIX, BEOS,
+ M88K, NS32K, PA-RISC, SuperH, and VAX,
+ and operating systems including 4.3BSD, AIX, BEOS,
BSD/OS, DG/UX, Dynix, HP-UX, IRIX, NeXTSTEP, QNX, SCO, SINIX, Sprite, SunOS,
Tru64 UNIX, and ULTRIX.
</para>
diff --git a/src/backend/storage/lmgr/s_lock.c b/src/backend/storage/lmgr/s_lock.c
index 9b389d99512..cba48b3e778 100644
--- a/src/backend/storage/lmgr/s_lock.c
+++ b/src/backend/storage/lmgr/s_lock.c
@@ -116,12 +116,7 @@ s_lock(volatile slock_t *lock, const char *file, int line, const char *func)
void
s_unlock(volatile slock_t *lock)
{
-#ifdef TAS_ACTIVE_WORD
- /* HP's PA-RISC */
- *TAS_ACTIVE_WORD(lock) = -1;
-#else
*lock = 0;
-#endif
}
#endif
diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index 78987f3154a..c911c6b9564 100644
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -69,8 +69,6 @@
#include "port/atomics/arch-x86.h"
#elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
#include "port/atomics/arch-ppc.h"
-#elif defined(__hppa) || defined(__hppa__)
-#include "port/atomics/arch-hppa.h"
#endif
/*
diff --git a/src/include/port/atomics/arch-hppa.h b/src/include/port/atomics/arch-hppa.h
deleted file mode 100644
index 50812a7f317..00000000000
--- a/src/include/port/atomics/arch-hppa.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * arch-hppa.h
- * Atomic operations considerations specific to HPPA
- *
- * Portions Copyright (c) 1996-2024, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * src/include/port/atomics/arch-hppa.h
- *
- *-------------------------------------------------------------------------
- */
-
-/* HPPA doesn't do either read or write reordering */
-#define pg_memory_barrier_impl() pg_compiler_barrier_impl()
diff --git a/src/include/port/atomics/fallback.h b/src/include/port/atomics/fallback.h
index 71c1df5d28c..34cfee110fb 100644
--- a/src/include/port/atomics/fallback.h
+++ b/src/include/port/atomics/fallback.h
@@ -75,11 +75,7 @@ typedef struct pg_atomic_flag
* be content with just one byte instead of 4, but that's not too much
* waste.
*/
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
- int sema[4];
-#else
int sema;
-#endif
volatile bool value;
} pg_atomic_flag;
@@ -93,11 +89,7 @@ typedef struct pg_atomic_flag
typedef struct pg_atomic_uint32
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
- int sema[4];
-#else
int sema;
-#endif
volatile uint32 value;
} pg_atomic_uint32;
@@ -111,11 +103,7 @@ typedef struct pg_atomic_uint32
typedef struct pg_atomic_uint64
{
/* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
- int sema[4];
-#else
int sema;
-#endif
volatile uint64 value;
} pg_atomic_uint64;
diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 29ac6cdcd92..02c68513a53 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -526,71 +526,6 @@ do \
#endif /* __mips__ && !__sgi */
-#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
-/*
- * HP's PA-RISC
- *
- * Because LDCWX requires a 16-byte-aligned address, we declare slock_t as a
- * 16-byte struct. The active word in the struct is whichever has the aligned
- * address; the other three words just sit at -1.
- */
-#define HAS_TEST_AND_SET
-
-typedef struct
-{
- int sema[4];
-} slock_t;
-
-#define TAS_ACTIVE_WORD(lock) ((volatile int *) (((uintptr_t) (lock) + 15) & ~15))
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
- volatile int *lockword = TAS_ACTIVE_WORD(lock);
- int lockval;
-
- /*
- * The LDCWX instruction atomically clears the target word and
- * returns the previous value. Hence, if the instruction returns
- * 0, someone else has already acquired the lock before we tested
- * it (i.e., we have failed).
- *
- * Notice that this means that we actually clear the word to set
- * the lock and set the word to clear the lock. This is the
- * opposite behavior from the SPARC LDSTUB instruction. For some
- * reason everything that H-P does is rather baroque...
- *
- * For details about the LDCWX instruction, see the "Precision
- * Architecture and Instruction Reference Manual" (09740-90014 of June
- * 1987), p. 5-38.
- */
- __asm__ __volatile__(
- " ldcwx 0(0,%2),%0 \n"
-: "=r"(lockval), "+m"(*lockword)
-: "r"(lockword)
-: "memory");
- return (lockval == 0);
-}
-
-#define S_UNLOCK(lock) \
- do { \
- __asm__ __volatile__("" : : : "memory"); \
- *TAS_ACTIVE_WORD(lock) = -1; \
- } while (0)
-
-#define S_INIT_LOCK(lock) \
- do { \
- volatile slock_t *lock_ = (lock); \
- lock_->sema[0] = -1; \
- lock_->sema[1] = -1; \
- lock_->sema[2] = -1; \
- lock_->sema[3] = -1; \
- } while (0)
-
-#define S_LOCK_FREE(lock) (*TAS_ACTIVE_WORD(lock) != 0)
-
-#endif /* __hppa || __hppa__ */
-
/*
* If we have no platform-specific knowledge, but we found that the compiler
diff --git a/src/tools/pginclude/headerscheck b/src/tools/pginclude/headerscheck
index 4a157d0a5f2..436e2b92a33 100755
--- a/src/tools/pginclude/headerscheck
+++ b/src/tools/pginclude/headerscheck
@@ -107,12 +107,10 @@ do
# Likewise, these files are platform-specific, and the one
# relevant to our platform will be included by atomics.h.
test "$f" = src/include/port/atomics/arch-arm.h && continue
- test "$f" = src/include/port/atomics/arch-hppa.h && continue
test "$f" = src/include/port/atomics/arch-ppc.h && continue
test "$f" = src/include/port/atomics/arch-x86.h && continue
test "$f" = src/include/port/atomics/fallback.h && continue
test "$f" = src/include/port/atomics/generic.h && continue
- test "$f" = src/include/port/atomics/generic-acc.h && continue
test "$f" = src/include/port/atomics/generic-gcc.h && continue
test "$f" = src/include/port/atomics/generic-msvc.h && continue
test "$f" = src/include/port/atomics/generic-sunpro.h && continue
generated by cgit v1.2.3 (git 2.25.1) at 2025-05-31 14:25:05 +0000