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| author | John Naylor <john.naylor@postgresql.org> | 2023-08-10 11:36:15 +0700 |
|---|---|---|
| committer | John Naylor <john.naylor@postgresql.org> | 2023-08-10 11:36:15 +0700 |
| commit | 4d14ccd6af6e788a7b79ff3ed77bda5bc71d2edc (patch) | |
| tree | bef29664090f4cad6db22352d3c8a401bf724c27 /src/include/port/pg_crc32c.h | |
| parent | fa2e874946c5b9f23394358c131e987df7cc8ffb (diff) | |
| download | postgresql-4d14ccd6af6e788a7b79ff3ed77bda5bc71d2edc.tar.gz postgresql-4d14ccd6af6e788a7b79ff3ed77bda5bc71d2edc.zip | |
Use native CRC instructions on 64-bit LoongArch
As with the Intel and Arm CRC instructions, compiler intrinsics for
them must be supported by the compiler. In contrast, no runtime check
is needed. Aligned memory access is faster, so use the Arm coding as
a model.
YANG Xudong
Discussion: https://postgr.es/m/b522a0c5-e3b2-99cc-6387-58134fb88cbe%40ymatrix.cn
Diffstat (limited to 'src/include/port/pg_crc32c.h')
| -rw-r--r-- | src/include/port/pg_crc32c.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/include/port/pg_crc32c.h b/src/include/port/pg_crc32c.h index 7f8779261c3..d085f1dc00b 100644 --- a/src/include/port/pg_crc32c.h +++ b/src/include/port/pg_crc32c.h @@ -58,6 +58,15 @@ extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t le extern pg_crc32c pg_comp_crc32c_armv8(pg_crc32c crc, const void *data, size_t len); +#elif defined(USE_LOONGARCH_CRC32C) +/* Use LoongArch CRCC instructions. */ + +#define COMP_CRC32C(crc, data, len) \ + ((crc) = pg_comp_crc32c_loongarch((crc), (data), (len))) +#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF) + +extern pg_crc32c pg_comp_crc32c_loongarch(pg_crc32c crc, const void *data, size_t len); + #elif defined(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK) || defined(USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK) /* |