diff options
| author | Thomas Munro <tmunro@postgresql.org> | 2023-04-08 11:04:49 +1200 |
|---|---|---|
| committer | Thomas Munro <tmunro@postgresql.org> | 2023-04-08 16:35:07 +1200 |
| commit | d4e71df6d757fd21c363164a3a4d3b5681462662 (patch) | |
| tree | 27db4af292830160ecfe4789645f87d0e5a1daea /src/backend/access/transam/xlogprefetcher.c | |
| parent | faeedbcefd40bfdf314e048c425b6d9208896d90 (diff) | |
| download | postgresql-d4e71df6d757fd21c363164a3a4d3b5681462662.tar.gz postgresql-d4e71df6d757fd21c363164a3a4d3b5681462662.zip | |
Add io_direct setting (developer-only).
Provide a way to ask the kernel to use O_DIRECT (or local equivalent)
where available for data and WAL files, to avoid or minimize kernel
caching. This hurts performance currently and is not intended for end
users yet. Later proposed work would introduce our own I/O clustering,
read-ahead, etc to replace the facilities the kernel disables with this
option.
The only user-visible change, if the developer-only GUC is not used, is
that this commit also removes the obscure logic that would activate
O_DIRECT for the WAL when wal_sync_method=open_[data]sync and
wal_level=minimal (which also requires max_wal_senders=0). Those are
non-default and unlikely settings, and this behavior wasn't (correctly)
documented. The same effect can be achieved with io_direct=wal.
Author: Thomas Munro <thomas.munro@gmail.com>
Author: Andres Freund <andres@anarazel.de>
Author: Bharath Rupireddy <bharath.rupireddyforpostgres@gmail.com>
Reviewed-by: Justin Pryzby <pryzby@telsasoft.com>
Reviewed-by: Bharath Rupireddy <bharath.rupireddyforpostgres@gmail.com>
Discussion: https://postgr.es/m/CA%2BhUKGK1X532hYqJ_MzFWt0n1zt8trz980D79WbjwnT-yYLZpg%40mail.gmail.com
Diffstat (limited to 'src/backend/access/transam/xlogprefetcher.c')
| -rw-r--r-- | src/backend/access/transam/xlogprefetcher.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/backend/access/transam/xlogprefetcher.c b/src/backend/access/transam/xlogprefetcher.c index 046e40d143a..7ba18f2a761 100644 --- a/src/backend/access/transam/xlogprefetcher.c +++ b/src/backend/access/transam/xlogprefetcher.c @@ -785,7 +785,7 @@ XLogPrefetcherNextBlock(uintptr_t pgsr_private, XLogRecPtr *lsn) block->prefetch_buffer = InvalidBuffer; return LRQ_NEXT_IO; } - else + else if ((io_direct_flags & IO_DIRECT_DATA) == 0) { /* * This shouldn't be possible, because we already determined |