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| author | John Naylor <john.naylor@postgresql.org> | 2023-08-10 11:36:15 +0700 |
|---|---|---|
| committer | John Naylor <john.naylor@postgresql.org> | 2023-08-10 11:36:15 +0700 |
| commit | 4d14ccd6af6e788a7b79ff3ed77bda5bc71d2edc (patch) | |
| tree | bef29664090f4cad6db22352d3c8a401bf724c27 /configure.ac | |
| parent | fa2e874946c5b9f23394358c131e987df7cc8ffb (diff) | |
| download | postgresql-4d14ccd6af6e788a7b79ff3ed77bda5bc71d2edc.tar.gz postgresql-4d14ccd6af6e788a7b79ff3ed77bda5bc71d2edc.zip | |
Use native CRC instructions on 64-bit LoongArch
As with the Intel and Arm CRC instructions, compiler intrinsics for
them must be supported by the compiler. In contrast, no runtime check
is needed. Aligned memory access is faster, so use the Arm coding as
a model.
YANG Xudong
Discussion: https://postgr.es/m/b522a0c5-e3b2-99cc-6387-58134fb88cbe%40ymatrix.cn
Diffstat (limited to 'configure.ac')
| -rw-r--r-- | configure.ac | 38 |
1 files changed, 29 insertions, 9 deletions
diff --git a/configure.ac b/configure.ac index 5153b8b3fdc..116c5a1f68b 100644 --- a/configure.ac +++ b/configure.ac @@ -2099,6 +2099,12 @@ if test x"$pgac_armv8_crc32c_intrinsics" != x"yes"; then PGAC_ARMV8_CRC32C_INTRINSICS([-march=armv8-a+crc]) fi +# Check for LoongArch CRC intrinsics to do CRC calculations. +# +# Check if __builtin_loongarch_crcc_* intrinsics can be used +# with the default compiler flags. +PGAC_LOONGARCH_CRC32C_INTRINSICS() + AC_SUBST(CFLAGS_CRC) # Select CRC-32C implementation. @@ -2115,9 +2121,12 @@ AC_SUBST(CFLAGS_CRC) # we're not targeting such a processor, but can nevertheless produce code that # uses the CRC instructions, compile both, and select at runtime. # -# You can override this logic by setting the appropriate USE_*_CRC32 flag to 1 +# You can skip the runtime check by setting the appropriate USE_*_CRC32 flag to 1 # in the template or configure command line. -if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_ARMV8_CRC32C" = x"" && test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x""; then +# +# If we are targeting a LoongArch processor, CRC instructions are +# always available (at least on 64 bit), so no runtime check is needed. +if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_ARMV8_CRC32C" = x"" && test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_LOONGARCH_CRC32C" = x""; then # Use Intel SSE 4.2 if available. if test x"$pgac_sse42_crc32_intrinsics" = x"yes" && test x"$SSE4_2_TARGETED" = x"1" ; then USE_SSE42_CRC32C=1 @@ -2135,10 +2144,15 @@ if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && if test x"$pgac_armv8_crc32c_intrinsics" = x"yes"; then USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK=1 else - # fall back to slicing-by-8 algorithm, which doesn't require any - # special CPU support. - USE_SLICING_BY_8_CRC32C=1 - fi + # LoongArch CRCC instructions. + if test x"$pgac_loongarch_crc32c_intrinsics" = x"yes"; then + USE_LOONGARCH_CRC32C=1 + else + # fall back to slicing-by-8 algorithm, which doesn't require any + # special CPU support. + USE_SLICING_BY_8_CRC32C=1 + fi + fi fi fi fi @@ -2166,9 +2180,15 @@ else PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o pg_crc32c_armv8_choose.o" AC_MSG_RESULT(ARMv8 CRC instructions with runtime check) else - AC_DEFINE(USE_SLICING_BY_8_CRC32C, 1, [Define to 1 to use software CRC-32C implementation (slicing-by-8).]) - PG_CRC32C_OBJS="pg_crc32c_sb8.o" - AC_MSG_RESULT(slicing-by-8) + if test x"$USE_LOONGARCH_CRC32C" = x"1"; then + AC_DEFINE(USE_LOONGARCH_CRC32C, 1, [Define to 1 to use LoongArch CRCC instructions.]) + PG_CRC32C_OBJS="pg_crc32c_loongarch.o" + AC_MSG_RESULT(LoongArch CRCC instructions) + else + AC_DEFINE(USE_SLICING_BY_8_CRC32C, 1, [Define to 1 to use software CRC-32C implementation (slicing-by-8).]) + PG_CRC32C_OBJS="pg_crc32c_sb8.o" + AC_MSG_RESULT(slicing-by-8) + fi fi fi fi |