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* Add RGA compiler support to HLSL (#3961)gh-3951Jeremy Ong2022-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add RGA compiler support to HLSL AMD's Radeon GPU Analyzer (RGA) tool is an indispensible tool for graphics programmers to inspect the instructions that will be compiled by the driver for a given shader and GPU. The integration of this compiler into CE is slightly unconventional for reasons to be explained here: When trying to compile HLSL directly to ISA, RGA requires a full pipeline state description (specified for graphics pipelines using a gpso file), and a root signature, since changes to either affect how resources and data within the shader are accessed or written to. Specifying both is difficult to the extent that it would add significant usage friction to the tool. An informal survey among other senior graphics programming practitioners suggested unanimous agreement to infer both pipeline state and root signature where possible, with the expectation that if more accurate ISA code was needed, RGA could be used directly offline. Fortunately, RGA supplies an alternative workflow, wherein SPIR-V code can be compiled directly to the approximate ISA, bypassing both the pipeline and root signature requirement. To use RGA, the following steps are performed: 1. Use the default DXC compiler to emit SPIR-V as text to a temporary file in the selected temp folder. 2. Compile the ISA using RGA, consuming the output of step 1 3. Rename the resulting file to the output file CE expects In addition, a non-standard argument --asic is added to the user options. This argument is filtered for DXC, but for RGA is forwarded as the selected ASIC to emit ISA for. These steps are performed by a single `rga.js` script, which is invoked as an executable. This chaining could have been added within CE library code directly, but being an atypical flow, felt more appropriate as a separate script (which has the benefit of faster iteration, due to being loaded on each compilation request). The paths to DXC and RGA are supplied as arguments through a simple CLI interface. NOTE: This commit also adds `-Zi` and `-Qembed_debug` flags to both DXC and RGA, which provides line association data for DXIL. Signed-off-by: Jeremy Ong <jeremycong@gmail.com> * Incorporate PR feedback (see commit body) This commit introduces several changes: - HLSL compiler is now Typescript - A new RGACompiler Typescript class is used to invoke RGA - The multi-phase compilation that was previously done using a Node script now leverages the existing sandboxed execution facilities - The DXC compiler is configurable as a property on the RGA configuration, and an example is provided in hlsl.defaults.properties As there are several steps needed to compile HLSL to AMD ISA as before, as steps are done asynchronously so the runtime can continue to service other requests during compilation (either DXC or RGA) or file I/O. Signed-off-by: Jeremy Ong <jeremycong@gmail.com> Signed-off-by: Jeremy Ong <jeremycong@gmail.com> Co-authored-by: Rubén Rincón Blanco <ruben@rinconblanco.es>
* Add preliminary HLSL support (#3932)gh-3870Jeremy Ong2022-08-09
* Add preliminary HLSL support - Adds a new language mode to monaco, extending the base C++ layer with HLSL intrinsics and types - Adds a new `HLSLCompiler` class - Adds a sample pixel shader The compiler used to test this locally is the [DirectX Shader Compiler](https://github.com/microsoft/DirectXShaderCompiler) (aka DXC), which needs to also be added to the [infra](https://github.com/compiler-explorer/infra) project. Some guidance is needed before this PR can be merged: 1. While DXC can run on Linux, there are no binaries available so this compiler must be built. Are there examples that show how we should do this as part of the infra CI/CD? Should we build and host it separately instead? The build process for DXC on Linux is relatively straightforward and documented [here](https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DxcOnUnix.rst). 2. The example code doesn't compile unless the user also supplies additional compiler flags `-T ps_6_6 -E PSMain`. Is there a way to load these flags conditionally only if the sample is loaded? 3. Technically, DXC emits DXIL IR (based on LLVM IR) and I am wondering if it's possible to extend an existing LLVM backend. In addition, the `-spirv` compiler flag could be emitted to target the SPIR-V backend instead, so I'm curious if there is a good way to express the target backend. Signed-off-by: Jeremy Ong <jeremycong@gmail.com> * Fix copyright dates, remove unnecessary strict usage, and remove placeholder logo Signed-off-by: Jeremy Ong <jeremycong@gmail.com> * Rebase and remove unneeded HLSL logo Signed-off-by: Jeremy Ong <jeremycong@gmail.com> * Fix lint errors Signed-off-by: Jeremy Ong <jeremycong@gmail.com> * Simply HLSL sample and remove default config Signed-off-by: Jeremy Ong <jeremycong@gmail.com>